Magic VLSI Layout Tool Version 8.2 *

ext, extract


Circuit netlist extractor

Usage:

extract option

where option may be one of the following:
all
Extract the root cell and all its children. This bypasses the incremental extraction and ensures that a new .ext file is written for every cell definition.
cell name
Extract the indicated cell into file name
do|no [option]
Enable or disable an extractor option, where option may be one of the following:
capacitance
resistance
coupling
length
adjust
all
length [option]
Control pathlength extraction information, where option may be one of the following:
driver termname
receiver termname
clear
help
Print help information
parents
Extract the selected cell and all its parents
showparents
List the cell and all parents of selected cell. Note that this is not really an extract option and is superceded by the cellname command.
[list|listall] style [stylename]
Set the current extraction style to stylename. Without arguments, print the current extraction style. With keyword list, return the current extraction style as a Tcl result. With keyword listall, return all valid extraction styles for the technology as a Tcl list.
unique [#]
Generate unique names when different nodes have the same name
warn [[no] option]
Enable/disable reporting of non-fatal errors, where option may be one of the following:
fets
labels
dup
all

Summary:

With no options given, the extract command incrementally extracts the root cell and all its children into separate .ext files. With options, the effect is as described in the Usage section above.

Implementation Notes:

extract is implemented as a built-in magic command.

ext is an alias for command extract (allowed abbreviation where the usage would otherwise be ambiguous).

See Also:

extresist
ext2spice
ext2sim

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Last updated: March 7, 2020 at 1:06pm