#---------------------------------------------------------- # Copyright (c) 2019 R. Timothy Edwards # Revisions: See below # # This file is an Open Source foundry process describing # a generic 6-metal process, to be used with qflow. Only # backend layers (metal and via) are described, which # makes the techfile usable with qflow for showing abstract # views and routing. To match a specific foundry process, # change metal width, spacing, area, etc., rules, correct # the squares rules for contact cuts, and correct the GDS # layer mappings for cifoutput (and optionally cifinput, # although that is not used directly by qflow). # # Poly and diffusion are defined for any LEF files # declaring them as masterslice layers, and to handle # poly and diffusion contacts. Well is also defined, but # non-specific (not defined as N or P well). # #---------------------------------------------------------- # This file is designed to be used with magic versions 8.2 # or newer. #---------------------------------------------------------- tech format 32 qflow_template end version version 20190916 description "Qflow template techfile" end #---------------------------------------------------------- # Status: 9/16/19: Original version #---------------------------------------------------------- #----------------------------------------------------- # Tile planes #----------------------------------------------------- planes well,w active,a poly,p metal1,m1 metal2,m2 metal3,m3 metal4,m4 metal5,m5 metal6,m6 comment,c end #----------------------------------------------------- # Tile types #----------------------------------------------------- types # Well well well,w # Diffusion active diff,diffusion active diffcont,dc,diffcontact,diffcut,diffc # Poly poly poly,p,polysilicon poly polycont,pc,pcontact,polycut,polyc # Metal 1 metal1 metal1,m1,met1 metal1 obsm1 metal1 via1,m2contact,m2cut,m2c,via,v,v1 # Metal 2 metal2 metal2,m2,met2 metal2 obsm2 metal2 via2,m3contact,m3cut,m3c,v2 # Metal 3 metal3 metal3,m3,met3 metal3 obsm3 metal3 via3,m4contact,m4cut,m4c,v3 # Metal 4 metal4 metal4,m4,met4 metal4 obsm4 metal4 via4,m5contact,m5cut,m5c,v4 # Metal 5 metal5 metal5,m5,met5 metal5 obsm5 metal5 via5,m6contact,m6cut,m6c,v5 # Metal 6 metal6 metal6,m6,met6 metal6 obsm6 # Miscellaneous comment comment comment obscomment end #----------------------------------------------------- # Magic contact types #----------------------------------------------------- contact polyc poly metal1 diffc diff metal1 via1 metal1 metal2 via2 metal2 metal3 via3 metal3 metal4 via4 metal4 metal5 via5 metal5 metal6 stackable end #----------------------------------------------------- # Layer aliases #----------------------------------------------------- aliases allm1 *m1 allm2 *m2 allm3 *m3 allm4 *m4 allm5 *m5 allm6 *m6 end #----------------------------------------------------- # Layer drawing styles #----------------------------------------------------- styles styletype mos well nwell diff ndiffusion diffc ndiffusion metal1 contact_X'es poly polysilicon polyc polysilicon metal1 contact_X'es metal1 metal1 obsm1 metal1 via1 metal1 metal2 via1arrow metal2 metal2 obsm2 metal2 via2 metal2 metal3 via2arrow metal3 metal3 obsm3 metal3 via3 metal3 metal4 via3alt metal4 metal4 obsm4 metal4 via4 metal4 metal5 via4 metal5 metal5 obsm5 metal5 via5 metal5 metal6 via5 metal6 metal6 obsm6 metal6 comment comment error_p error_waffle error_s error_waffle error_ps error_waffle magnet substrate_field_implant rotate via3alt fence via5 end #----------------------------------------------------- # Special paint/erase rules #----------------------------------------------------- compose paint m1 obsm1 m1 paint m2 obsm2 m2 paint m3 obsm3 m3 paint m4 obsm4 m4 paint m5 obsm5 m5 paint m6 obsm6 m6 end #----------------------------------------------------- # Electrical connectivity #----------------------------------------------------- connect *diff *diff *poly *poly *m1 *m1 *m2 *m2 *m3 *m3 *m4 *m4 *m5 *m5 *m6 *m6 end #----------------------------------------------------- # CIF/GDS output layer definitions #----------------------------------------------------- cifoutput style gdsii scalefactor 10 nanometers options calma-permissive-labels gridlimit 5 #---------------------------------------------------------------- # WELL #---------------------------------------------------------------- layer WELL well calma 1 0 #---------------------------------------------------------------- # DIFF #---------------------------------------------------------------- layer DIFF *diff labels *diff calma 2 0 layer DIFFTXT labels *diff noport calma 2 1 layer DIFFPIN labels *diff port calma 2 2 #---------------------------------------------------------------- # POLY #---------------------------------------------------------------- layer POLY *poly labels *poly calma 3 0 layer POLYTXT labels *poly noport calma 3 1 layer POLYPIN labels *poly port calma 3 2 #---------------------------------------------------------------- # CONT #---------------------------------------------------------------- layer CONT polyc,diffc squares-grid 0 150 150 calma 4 0 #---------------------------------------------------------------- # MET1 #---------------------------------------------------------------- layer MET1 allm1 calma 5 0 layer MET1TXT labels allm1 noport calma 5 1 layer MET1PIN labels allm1 port calma 5 2 #---------------------------------------------------------------- # VIA1 #---------------------------------------------------------------- layer VIA1 via1 squares-grid 0 150 150 calma 6 0 #---------------------------------------------------------------- # MET2 #---------------------------------------------------------------- layer MET2 allm2 calma 7 0 layer MET2TXT labels allm2 noport calma 7 1 layer MET2PIN labels allm2 port calma 7 2 #---------------------------------------------------------------- # VIA2 #---------------------------------------------------------------- layer VIA2 via2 squares-grid 0 150 150 calma 8 0 #---------------------------------------------------------------- # MET3 #---------------------------------------------------------------- layer MET3 allm3 calma 9 0 layer MET3TXT labels allm3 noport calma 9 1 layer MET3PIN labels allm3 port calma 9 2 #---------------------------------------------------------------- # VIA3 #---------------------------------------------------------------- layer VIA3 via3 squares-grid 0 150 150 calma 10 0 #---------------------------------------------------------------- # MET4 #---------------------------------------------------------------- layer MET4 allm4 labels allm4 noport calma 11 0 layer MET4TXT labels allm4 noport calma 11 1 layer MET4PIN labels allm4 port calma 11 2 #---------------------------------------------------------------- # VIA4 #---------------------------------------------------------------- layer VIA4 via4 squares-grid 0 150 150 calma 12 0 #---------------------------------------------------------------- # MET5 #---------------------------------------------------------------- layer MET5 allm5 calma 13 0 layer MET5TXT labels allm5 noport calma 13 1 layer MET5PIN labels allm5 port calma 13 2 #---------------------------------------------------------------- # VIA5 #---------------------------------------------------------------- layer VIA5 via5 squares-grid 0 150 150 calma 14 0 #---------------------------------------------------------------- # MET6 #---------------------------------------------------------------- layer MET6 allm6 calma 15 0 layer MET6TXT labels allm6 noport calma 15 1 layer MET6PIN labels allm6 port calma 15 2 #---------------------------------------------------------------- # BOUND #---------------------------------------------------------------- layer BOUND boundary calma 16 0 end #----------------------------------------------------------------------- cifinput style vendorimport scalefactor 10 nanometers gridlimit 5 options ignore-unknown-layer-labels no-reconnect-labels layer well WELL labels WELL layer diff DIFF,DIFFTXT,DIFFPIN labels DIFF labels DIFFTXT text labels DIFFPIN port layer poly POLY,POLYTXT,POLYPIN labels POLY labels POLYTXT text labels POLYPIN port layer diff CONT grow 75 shrink 75 and DIFF layer polyc CONT grow 75 shrink 75 and POLY layer m1 MET1,MET1TXT,MET1PIN labels MET1 labels MET1TXT text labels MET1PIN port layer m2c VIA1 grow 75 shrink 75 layer m2 MET2,MET2TXT,MET2PIN labels MET2 labels MET2TXT text labels MET2PIN port layer m3c VIA2 grow 75 shrink 75 layer m3 MET3,MET3TXT,MET3PIN labels MET3 labels MET3TXT text labels MET3PIN port layer via3 VIA3 grow 75 shrink 75 layer m4 MET4,MET4TXT,MET4PIN labels MET4 labels MET4TXT text labels MET4PIN port layer via4 VIA4 grow 75 shrink 75 layer m5 MET5,MET5TXT,MET5PIN labels MET5 labels MET5TXT text labels MET5PIN port layer via5 VIA5 grow 75 shrink 75 layer m6 MET6,MET6TXT,MET6PIN labels MET6 labels MET6TXT text labels MET6PIN port templayer boundary BOUND boundary calma WELL 1 0 calma DIFF 2 0 calma POLY 3 0 calma CONT 4 0 calma MET1 5 0 calma VIA1 6 0 calma MET2 7 0 calma VIA2 8 0 calma MET3 9 0 calma VIA3 10 0 calma MET4 11 0 calma VIA4 12 0 calma MET5 13 0 calma VIA5 14 0 calma MET6 15 0 calma BOUND 16 0 calma DIFFPIN 2 2 calma POLYPIN 3 2 calma MET1PIN 5 2 calma MET2PIN 7 2 calma MET3PIN 9 2 calma MET4PIN 11 2 calma MET5PIN 13 2 calma MET6PIN 15 2 calma DIFFTXT 2 1 calma POLYTXT 3 1 calma MET1TXT 5 1 calma MET2TXT 7 1 calma MET3TXT 9 1 calma MET4TXT 11 1 calma MET5TXT 13 1 calma MET6TXT 15 1 calma BOUND 16 0 end #----------------------------------------------------- # Digital flow maze router cost parameters #----------------------------------------------------- mzrouter end #----------------------------------------------------- # Vendor DRC rules #----------------------------------------------------- drc style drc scalefactor 10 #----------------------------- # WELL #----------------------------- width well 100 "Well width < %d (Well 1)" spacing well well 1000 touching_ok "Well spacing < %d (Well 2)" #----------------------------- # DIFF #----------------------------- width *diff 150 "Diffusion width < %d (Diff 1)" spacing *diff *diff 150 touching_ok "Diffusion spacing < %d (Diff 2)" #----------------------------- # POLY #----------------------------- width *poly 130 "Poly width < %d (Poly 1)" spacing *poly *poly 200 touching_ok "Poly spacing < %d (Poly 2)" #-------------------------------------------------------------------- # CONT #-------------------------------------------------------------------- width diffc/a 150 "Diffusion contact width < %d (Cont 1)" surround diffc/a diff 30 absence_illegal "Diffusion overlap of contact < %d (Cont 2)" exact_overlap diffc/a width polyc/p 150 "Poly contact width < %d (Cont 3)" surround polyc/a poly 30 absence_illegal "Poly overlap of contact < %d (Cont 4)" exact_overlap polyc/p #------------------------------------------------------------- # METAL1 #------------------------------------------------------------- width *m1 150 "Metal1 width < %d (Met1 1)" spacing allm1 allm1,obsm1 150 touching_ok "Metal1 spacing < %d (Met1 2)" area allm1,obsm1 50000 150 "Metal1 minimum area < %a (Met1 3)" widespacing allm1 3000 allm1,obsm1 200 touching_ok \ "Metal1 > %c spacing to unrelated m1 < %d (Met1 4)" #-------------------------------------------------- # VIA1 #-------------------------------------------------- width via1/m1 150 "Via1 width < %d (Via1 1)" spacing via1 via1 150 touching_ok "Via1 spacing < %d (Via1 2)" surround via1/m1 *m1 30 directional \ "Metal1 overlap of Via1 < %d in one direction (Via1 3)" surround via1/m2 *m2 30 directional \ "Metal2 overlap of Via1 < %d in one direction (Via1 4)" exact_overlap via1/m2 #-------------------------------------------------- # METAL2 #-------------------------------------------------- width allm2 150 "Metal2 width < %d (Met2 1)" spacing allm2 allm2,obsm2 150 touching_ok "Metal2 spacing < %d (Met2 2)" area allm2,obsm2 50000 150 "Metal2 minimum area < %a (Met2 3)" widespacing allm2 3000 allm2,obsm2 200 touching_ok \ "Metal2 > %c spacing to unrelated m2 < %d (Met2 4)" #-------------------------------------------------- # VIA2 #-------------------------------------------------- width v2/m2 150 "Via2 width < %d (Via2 1)" spacing v2 v2 150 touching_ok "Via2 spacing < 0.24um (Via2 2)" surround v2/m2 *m2 30 directional \ "Metal2 overlap of Via2 < %d in one direction (Via2 3)" surround v2/m3 *m3 30 absence_illegal "Metal3 overlap of Via2 < %d (via2 4)" exact_overlap v2/m2 #-------------------------------------------------- # METAL3 #-------------------------------------------------- width allm3 150 "Metal3 width < %d (Met3 1)" spacing allm3 allm3,obsm3 150 touching_ok "Metal3 spacing < %d (Met3 2)" area allm3,obsm3 50000 150 "Metal3 minimum area < %a (Met3 3)" widespacing allm3 3000 allm3,obsm3 200 touching_ok \ "Metal3 > %c spacing to unrelated m3 < %d (Met3 4)" #-------------------------------------------------- # VIA3 #-------------------------------------------------- width v3/m3 150 "Via3 width < %d (Via3 1)" spacing v3 v3 150 touching_ok "Via3 spacing < %d (Via3 2)" surround v3/m3 *m3 30 directional \ "Metal3 overlap of Via3 in one direction < %d (Via3 3)" surround v3/m4 *m4 30 directional \ "Metal4 overlap of Via3 in one direction < %d (Via3 4)" exact_overlap v3/m3 #----------------------------- # METAL4 #----------------------------- width allm4 150 "Metal4 width < %d (Met4 1)" spacing allm4 allm4,obsm4 150 touching_ok "Metal4 spacing < %d (Met4 2)" area allm4,obsm4 50000 150 "Metal4 minimum area < %a (Met4 3)" widespacing allm4 3000 allm4,obsm4 200 touching_ok \ "Metal4 > %c spacing to unrelated m4 < %d (Met4 4)" #-------------------------------------------------- # VIA4 #-------------------------------------------------- width v4/m4 150 "Via4 width < %d (Via4 1)" spacing v4 v4 150 touching_ok "Via4 spacing < %d (Via4 2)" surround v4/m4 *m4 30 directional \ "Metal4 overlap of Via4 in one direction < %d (Via4 3)" surround v4/m5 *m5 30 directional \ "Metal5 overlap of Via4 in one direction < %d (Via4 4)" exact_overlap v4/m4 #----------------------------- # METAL5 #----------------------------- width allm5 150 "Metal5 width < %d (Met5 1)" spacing allm5 allm5,obsm5 150 touching_ok "Metal5 spacing < %d (Met5 2)" area allm5,obsm5 50000 150 "Metal5 minimum area < %a (Met5 3)" widespacing allm5 3000 allm5,obsm5 200 touching_ok \ "Metal5 > %c spacing to unrelated m5 < %d (Met5 4)" #-------------------------------------------------- # VIA5 #-------------------------------------------------- width v5/m5 150 "Via4 width < %d (Via5 1)" spacing v5 v5 150 touching_ok "Via5 spacing < %d (Via5 2)" surround v5/m5 *m5 30 directional \ "Metal5 overlap of Via5 in one direction < %d (Via5 3)" surround v5/m6 *m6 30 directional \ "Metal6 overlap of Via5 in one direction < %d (Via5 4)" exact_overlap v5/m5 #----------------------------- # METAL6 #----------------------------- width allm6 150 "Metal5 width < %d (Met6 1)" spacing allm6 allm6,obsm6 150 touching_ok "Metal5 spacing < %d (Met6 2)" area allm6,obsm6 50000 150 "Metal5 minimum area < %a (Met6 3)" widespacing allm6 3000 allm6,obsm6 200 touching_ok \ "Metal6 > %c spacing to unrelated m6 < %d (Met6 4)" #---------------------------- # End DRC style #---------------------------- end #---------------------------- # LEF format definitions #---------------------------- lef routing m1 MET1 m1 met1 routing m2 MET2 m2 met2 routing m3 MET3 m3 met3 routing m4 MET4 m4 met4 routing m5 MET5 m5 met5 routing m6 MET6 m6 met6 cut m2c VIA1 via1 cont2 via12 cut m3c VIA2 via2 cont3 via23 cut m4c VIA3 via3 cont4 via34 cut m5c VIA4 via4 cont5 via45 cut m6c VIA5 via5 cont6 via56 obs obsm1 MET1 obs obsm2 MET2 obs obsm3 MET3 obs obsm4 MET4 obs obsm5 MET5 obs obsm6 MET6 # Map contact obstructions to the base metal layer obs obsm1 VIA1 end #----------------------------------------------------- # Device and Parasitic extraction #----------------------------------------------------- extract style spice3 cscale 1 lambda 1.0 units microns step 100 sidehalo 8 planeorder well 0 planeorder active 1 planeorder poly 2 planeorder metal1 3 planeorder metal2 4 planeorder metal3 5 planeorder metal4 6 planeorder metal5 7 planeorder metal6 8 planeorder comment 9 substrate space/w well # Resistances are in milliohms per square resist well/well 1000000 resist diff/active 10000 resist poly/poly 8000 resist (allm1)/metal1 150 resist (allm2)/metal2 150 resist (allm3)/metal3 150 resist (allm4)/metal4 150 resist (allm5)/metal5 150 resist (allm6)/metal6 150 contact diffc 10000 contact polyc 10000 contact via1 2500 contact via2 2000 contact via3 2000 contact via4 2000 contact via5 2000 #------------------------------------------------------------------------- # Parasitic capacitance values: #------------------------------------------------------------------------- #well defaultareacap well well 150 #active defaultareacap *diff active 700 defaultperimeter *diff active 300 #poly defaultsidewall *poly active 70 defaultareacap *poly active well well 70 defaultperimeter *poly active well well 20 #metal1 defaultsidewall allm1 metal1 100 defaultareacap allm1 metal1 well well 50 defaultperimeter allm1 metal1 well well 10 defaultoverlap allm1 metal1 well well 30 #metal1->diff defaultoverlap allm1 metal1 *diff active 50 defaultsideoverlap allm1 metal1 *diff active 10 #metal1->poly defaultoverlap allm1 metal1 *poly poly 60 defaultsideoverlap allm1 metal1 *poly poly 10 #metal2 defaultsidewall allm2 metal2 100 defaultareacap allm2 metal2 well well 40 defaultperimeter allm2 metal2 well well 8 defaultoverlap allm2 metal2 well well 20 #metal2->diff defaultoverlap allm2 metal2 diff active 30 defaultsideoverlap allm2 metal2 diff active 6 #metal2->poly defaultoverlap allm2 metal2 poly poly 40 defaultsideoverlap allm2 metal2 poly poly 8 #metal2->metal1 defaultoverlap allm2 metal2 allm1 metal1 50 defaultsideoverlap allm2 metal2 allm1 metal1 10 #metal3 defaultsidewall allm3 metal3 100 defaultareacap allm3 metal3 well,well well 30 defaultoverlap allm3 metal3 well well 6 defaultperimeter allm3 metal3 well,well well 10 #metal3->diff defaultoverlap allm3 metal3 diff active 20 defaultsideoverlap allm3 metal3 diff active 4 #metal3->poly defaultoverlap allm3 metal3 poly poly 30 defaultsideoverlap allm3 metal3 poly poly 6 #metal3->metal1 defaultoverlap allm3 metal3 allm1 metal1 40 defaultsideoverlap allm3 metal3 allm1 metal1 8 #metal3->metal2 defaultoverlap allm3 metal3 allm2 metal2 50 defaultsideoverlap allm3 metal3 allm2 metal2 10 #metal4 defaultsidewall allm4 metal4 100 defaultareacap allm4 metal4 well,well well 20 defaultoverlap allm4 metal4 well well 4 defaultperimeter allm4 metal4 well 8 #metal4->diff defaultoverlap allm4 metal4 diff active 10 defaultsideoverlap allm4 metal4 diff active 4 #metal4->poly defaultoverlap allm4 metal4 poly poly 20 defaultsideoverlap allm4 metal4 poly poly 5 #metal4->metal1 defaultoverlap allm4 metal4 allm1 metal1 30 defaultsideoverlap allm4 metal4 allm1 metal1 6 #metal4->metal2 defaultoverlap allm4 metal4 allm2 metal2 40 defaultsideoverlap allm4 metal4 allm2 metal2 8 #metal4->metal3 defaultoverlap allm4 metal4 allm3 metal3 50 defaultsideoverlap allm4 metal4 allm3 metal3 10 #metal5 defaultsidewall allm5 metal5 100 defaultareacap allm5 metal5 well,well well 10 defaultoverlap allm5 metal5 well well 2 defaultperimeter allm5 metal5 well 6 #metal5->diff defaultoverlap allm5 metal5 diff active 4 defaultsideoverlap allm5 metal5 diff active 4 #metal5->poly defaultoverlap allm5 metal5 poly poly 10 defaultsideoverlap allm5 metal5 poly poly 5 #metal5->metal1 defaultoverlap allm5 metal5 allm1 metal1 20 defaultsideoverlap allm5 metal5 allm1 metal1 4 #metal5->metal2 defaultoverlap allm5 metal5 allm2 metal2 30 defaultsideoverlap allm5 metal5 allm2 metal2 6 #metal5->metal3 defaultoverlap allm5 metal5 allm3 metal3 40 defaultsideoverlap allm5 metal5 allm3 metal3 8 #metal5->metal4 defaultoverlap allm5 metal5 allm4 metal4 50 defaultsideoverlap allm5 metal5 allm4 metal4 10 #metal6 defaultsidewall allm6 metal6 100 defaultareacap allm6 metal6 well,well well 5 defaultoverlap allm6 metal6 well well 1 defaultperimeter allm6 metal6 well 4 #metal6->diff defaultoverlap allm6 metal6 diff active 4 defaultsideoverlap allm6 metal6 diff active 4 #metal6->poly defaultoverlap allm6 metal6 poly poly 5 defaultsideoverlap allm6 metal6 poly poly 5 #metal6->metal1 defaultoverlap allm6 metal6 allm1 metal1 10 defaultsideoverlap allm6 metal6 allm1 metal1 2 #metal6->metal2 defaultoverlap allm6 metal6 allm2 metal2 20 defaultsideoverlap allm6 metal6 allm2 metal2 4 #metal6->metal3 defaultoverlap allm6 metal6 allm3 metal3 30 defaultsideoverlap allm6 metal6 allm3 metal3 6 #metal6->metal4 defaultoverlap allm6 metal6 allm4 metal4 40 defaultsideoverlap allm6 metal6 allm4 metal4 8 #metal6->metal5 defaultoverlap allm6 metal6 allm5 metal5 50 defaultsideoverlap allm6 metal6 allm5 metal5 10 end #----------------------------------------------------- # Wiring tool definitions #----------------------------------------------------- wiring contact via1 16 m1 1 m2 0 contact via2 16 m2 1 m3 0 contact via3 18 m3 0 m4 4 contact via4 18 m4 0 m5 4 contact via5 18 m5 0 m6 4 end #----------------------------------------------------- # Plain old router. . . #----------------------------------------------------- router end #------------------------------------------------------------ # Plowing (restored in magic 8.2, need to fill this section) #------------------------------------------------------------ plowing end #----------------------------------------------------------------- # No special plot layers defined (use default PNM color choices) #----------------------------------------------------------------- plot style pnm default end