Qflow version 1.2 (Development) Download
Qflow version 1.1 (Stable) Download
Qflow source Git Repository
Qflow Dependencies Download (Mandatory)
Qflow Dependencies Download (Deprecated)
Development Distribution Source:
File Revision Size Date qflow-1.2.21.tgz 21 (561) February 21, 2018 at 3:00am
Stable Distribution Source:
File Revision Size Date qflow-1.1.103.tgz 103 (550) April 13, 2018 at 3:00am
Git development source download:The Open Circuit Design Git repository may be used for downloads of the most recent Qflow development source. To use the git server, do:Git stable source download:git clone git://opencircuitdesign.com/qflow-1.2
The Open Circuit Design Git repository may be used for downloads of the most recent Qflow stable source. To use the git server, do:git clone git://opencircuitdesign.com/qflow-1.1
In addition to the main qflow distribution download, you will need to obtain a number of other tools for the digital standard cell tool chain. The preferred toolchain includes the yosys synthesis tool. Note that yosys will automatically download and compile a version of the logic optimization tool abc.
Tool Purpose Site Link yosys Verilog parsing/synthesis/optimization/verification git repository http://www.clifford.at/yosys/download.html graywolf Placement github https://github.com/rubund/graywolf qrouter Detail routing Open Circuit Design http://opencircuitdesign.com/qrouter Magic Viewing, GDS Generation Open Circuit Design http://opencircuitdesign.com/magicNOTE: This patch file is required for versions of graywolf prior to the git update on May 25, 2015, if used with qflow version 1.1. Generally, however, it is recommended to simply update graywolf from the git repository.
If you decide to download and apply the patch anyway, put the patch file in the graywolf source directory, and dopatch -p1 < graywolf.patchThen recompile and reinstall.
An alternative toolflow for qflow-1.0 uses the Odin-II synthesis tool. This toolchain was developed before yosys was available and has been kept around more for historic reasons than anything else. Its capabilities are limited compared to yosys, and there are additional complications to the compile and install process. Qflow version 1.1 had abandoned this code as being too difficult to support and far inferior to yosys. It may still be used with qflow version 1.0.
Note that the link to "Odin-II" and "abc" is a pointer to the VTR package. Go to the website, click on the tab "Source", and follow the instructions for SVN check-out from there to get the most recent code sources. It is not necessary to compile the entire VTR distribution, although you may if you want to. Just make sure that you descend into the directories "libarchfpga" (a dependency for Odin-II), "ODIN_II", and "abc_with_bb_support", and run "make" in each of these subdirectories. That should be enough to compile everything needed by qflow.
As of September 2013, the updates to Odin-II have not become part of the official VTR distribution tarball. So you must use the SVN checkout to get the source that is compatible with qflow. Here are the instructions on how to get VTR through SVN, copied from the google code page:svn checkout http://vtr-verilog-to-routing.googlecode.com/svn/trunk/ vtr-verilog-to-routing-read-onlyI submitted a patch for Odin-II in October, 2013. As of this writing (October 11, 2013), it has not been incorporated into the Odin SVN source code. To prevent Odin-II from crashing when handling multiple verilog source files for a single project, download the file "odin.patch" below. Place the file in the Odin source code top level, and apply the patch by issuing the command "patch -p1 < odin.patch" from the command line. When this patch has been incorporated into the Odin SVN repository, I will remove the patch file from this website. For simple projects having only one module and one verilog source file, this patch is unnecessary.
The following tools were required by earlier versions of QFlow (before 1.0), and are no longer used in the synthesis flow.
Tool Purpose Site Link VTR Verilog parsing/synthesis (Odin-II) and logic verification (abc) Google Code http://code.google.com/p/vtr-verilog-to-routing/ Odin-II Source patch Source patch to correct two crash conditions in the handling of multiple verilog source files. Open Circuit Design odin.patch
The vl2mv download contains the same verilog parser that is found in VIS. However, this version contains a patch to fix a critical synthesis error. Note that VIS and vl2mv are no longer supported; instead, yosys or Odin-II are preferred as far more capable parsers (especially yosys). The sis download has a number of minor fixes that may make it easier to compile if you have a finicky compiler and can't get the version from the developer's website to work.
As of October 2014, TimberWolf has been added to the set of deprecated tools. Ruben Undheim has forked a streamlined version of TimberWolf and placed it on GitHub under the name "graywolf". This version has only the sources used by Qflow, has been rewritten to configure with "cmake", and installs to a standard location (i.e., /usr/local/bin/). Qflow is dropping TimberWolf support in favor of this update.
File Revision Size Date vl2mv-2.1.tgz 2.1 273KB June 11, 2009 sis-1.3.6.tgz 3.6 3.15MB October 6, 2012 TimberWolf Placement Open Circuit Design http://opencircuitdesign.com/magic/archive/timberwolf-6.3.4.tgz
Last updated: April 13, 2018 at 3:00am