Dissertation Table of Contents

• Abstract ii
• Acknowledgements iii
• List of Figures vii
• List of Tables xii
• 1 Introduction 1
  • 1.1 Introduction 1
  • 1.2 Mapping the Time-Frequency Plane 6
    • 1.2.1 Current-mode filterbanks 8
    • 1.2.2 Acoustic Transient Recognition 9
    • 1.2.3 Analog VLSI implementation of the transient classifier 10
    • 1.2.4 Overview: Learning and Continuous Speech Recognition 11
• 2 Continuous Wavelet Transform 14
  • 2.1 Introduction to the 1-Dimensional Continuous Wavelet Transform 14
  • 2.2 CWT vs. DWT 16
  • 2.3 Gabor Logons and Wavelets 18
  • 2.4 Complex Demodulation 20
  • 2.5 Complex Demodulation in the Continuous Wavelet Processor 23
  • 2.6 Post-processing 27
  • 2.7 An Analog CWT Processor 28
  • 2.8 Generating carrier sinusoids 29
  • 2.9 Analog multiplication 30
  • 2.10 Wavelet Gaussian Function 30
  • 2.11 Wavelet chip slice 34
  • 2.12 Chip Specifications 34
  • 2.13 Limitations of the Architecture 36
  • 2.14 Variations on an Architecture 37
  • 2.15 A Mixed-Mode Wavelet Processor 38
  • 2.16 Details of the Bit-Sequence-Finding Algorithm 42
  • 2.17 Sequence generation 44
  • 2.18 Results and implementation 46
  • 2.19 Modulation Multiplier 49
  • 2.20 Switch-Cap Wavelet Gaussian Function 50
  • 2.21 Output Time Multiplexing 52
  • 2.22 Wavelet chip slice 53
  • 2.23 Experimental Results 55
  • 2.24 Extensions of the Research 58
  • 2.25 Summary 61
• 3 Current-Mode Filterbank Frontend 62
  • 3.1 Time-Frequency Representations using Filterbanks 62
  • 3.2 Parallel Filterbanks for Transient Classification 63
  • 3.3 Current-Mode Filters for Current-Mode Applications 64
  • 3.4 High-Level Simulations of the Filterbank Frontend 66
  • 3.5 Introduction to Translinear Circuits and Log-domain Filtering 70
  • 3.6 Principles of log-domain synthesis 73
  • 3.7 First-Order Circuit synthesis 76
  • 3.8 Designing second-order s 78
  • 3.9 Technology limitations for low-frequency filter design 83
  • 3.10 Layout Considerations for VLSI Log-Domain Circuits 86
  • 3.11 Current-Mode Circuits for Non-Filtering Applications 89
  • 3.12 Signal Rectification and Smoothing 89
  • 3.13 Signal Rectifier 90
  • 3.14 Signal Peak-Peak Detector 91
  • 3.15 L-1 Normalization Array 94
  • 3.16 Experimental Results 97
  • 3.17 Summary 105
• 4 Acoustic Transient Processing 106
  • 4.1 Introduction 106
    • 4.1.1 The Problem of Speech Recognition 106
    • 4.1.2 Acoustic Transients 107
  • 4.2 Algorithms 108
    • 4.2.1 Simplifying The Correlation Equation 112
  • 4.3 Simulations 119
    • 4.3.1 The Hopkins Electronic Ear (HEEAR) Processor 120
    • 4.3.2 Simulating the Acoustic Transient Baseline Algorithm 121
    • 4.3.3 Optimizing Correlation Algorithms 123
    • 4.3.4 Simulations of different zero-mean representations 125
    • 4.3.5 High-Level Simulations of ATP Mixed-Mode VLSI Hardware 128
    • 4.3.6 Optimization of the classifier using per-class gains 128
    • 4.3.7 System Robustness 131
    • 4.3.8 Research Directions 133
    • 4.3.9 Remarks 134
  • 4.4 Hardware Implementation of the Acoustic Transient Processor 135
    • 4.4.1 Current-switching Memory Array 135
    • 4.4.2 Bucket Brigade Device 138
    • 4.4.3 Circuit input 140
    • 4.4.4 Characterizations of the VLSI Hardware 141
    • 4.4.5 Experimental Results 144
    • 4.4.6 Summary 147
  • 4.5 The Digital ATP 149
  • 4.6 Digital correlator custom VLSI architecture 149
  • 4.7 Digital correlator semicustom FPGA architecture 151
  • 4.8 The Switch-Capacitor Frontend 156
  • 4.9 Experimental results of the trinary-trinary correlation hardware 161
    • 4.9.1 Method of input segmentation 161
    • 4.9.2 Method of template generation 163
    • 4.9.3 Experimental Results 164
• 5 Learning and Speech Recognition 171
  • 5.1 Automatic Template Learning for Template-Based Correlation 171
  • 5.2 Average-Value Templates 172
  • 5.3 Deterministic Methods: Statistical Component Analysis 174
  • 5.4 Support Vector Machines 177
  • 5.5 Heuristic Methods (Unnikrishnan/Hopfield) 178
  • 5.6 Biologically-Inspired Methods 183
• A Linearity of a Transconductance Amp 187
• B scshape Matlab Code for Sine Sequence Generation 190
  • B.1 Commentary 193
• C Correlation with Time Differentiation 195
  • C.1 Proof of validity of the pipelined architecture 198
• D Simulation of the ATP Frontend 201
  • D.1 Commentary 207
• E Simulation of the ATP Correlator 209
  • E.1 Commentary 212
• F Optimizing per-class gains in the ATP 214
  • F.1 Commentary 219
• Bibliography 220
• Vita 227

Last updated: October 11, 2005 at 11:34pm