An Analog Biomimetic Sonar Signal Processor

The BioSonar project attempts to re-create, in electronic form, the auditory signal processing mechanisms of biologically-based sonar (namely, bats and dolphins). The Office of Naval Research is especially interested in underwater object recognition and classification. The Navy uses specially-trained teams of humans and dolphins to detect mines buried just below the sea floor, and would like to replace or enhance this very limited capability with some sort of automated processing. The primary goal is to match the accuracy of the human-dolphin teams. A secondary goal is to provide the capability in a small, power-efficient package that can be carried underwater and perform the task in real-time. Several groups have been working on the first goal, including our partner Orincon Corporation in Hawaii. They have a sophisticated processing system for classifying underwater buried mine sonar data. Our goal is to redesign their algorithms into a form which can be implemented in low-power analog VLSI, and build a system able to operate in real-time.

A first step in this project was to design and build a prototype frontend filterbank and signal-processing system using board-level components. By using non-volatile, programmable analog and digital processors all over the board, we have a system which is flexible enough to implement numerous styles of filterbank processing, emulating the biological cochlea as well as some aspects of the auditory pathway up to the auditory nerve, but can be interfaced directly to a computer for post-processing of the data. The system input can be received either directly from a microphone or by download from a computer.

The application note (user manual) for the biosonar frontend signal processor board is complete and can be downloaded from the following link:

User Manual (PDF)
User Manual (PostScript)
The next stage of the project (2001-2003) is to miniaturize the frontend processing into a single integrated circuit, and to couple it with a classification system (also a hybrid analog-digital VLSI chip) implementing a support-vector machine (SVM).

Funding: ONR grant N00014-01-1-0315.

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email: tim@stravinsky.jhuapl.edu

Last updated: October 11, 2005 at 11:42pm