Microfabrication Lab Project Report:
A Simple CMOS Pressure Sensor

R. Timothy Edwards
December, 1994

Abstract-In a clean room that isn't especially clean, in a crowded environment with mostly hand-me-down and often faulty equipment, and in the face of great odds, we actually fabricated a real, working pressure sensor. What more could we ask for?

Disclaimer-This paper describes a course in the Electrical and Computer Engineering Department of Johns Hopkins University Whiting School of Engineering. The lab is intended to give students hands-on experience with chip fabrication. It is not a commercial fab line, and its capabilities are behind the state-of-the-art by at least twenty years, being composed of second-hand equipment, much of which dates back that far. This online paper is intended to give interested students and others a feel for what the course is about, and for what can be accomplished with such a setup.

For More Information-Every now and then I receive email from people interested in detailed information about the microfabrication laboratory. I am not especially qualified to answer such questions, but I would suggest contacting the laboratory TAs or the course instructor. They are as follows:

Introduction

Microfabricated pressure sensors comprise a small but useful subset of integrated circuits. Integrated sensors of high quality can be very sensitive to pressure changes, making them ideal for applications in which bulky machined sensors are not able to perform, or are too large, or consume too much power.

Typical applications of integrated pressure sensors include microphones, biomedical instrumentation ( e.g., blood and fluid pressure), vacuum sensing, wind-tunnel model instrumentation, automobile power and acceleration measurement, and even household electronics [3].

There are a number of ways to go about designing and building an integrated sensor. The most common and inexpensive type, which is the type built for this project, is based on the piezoresistive effect, which is described in detail below. Piezoresitors can be made of doped silicon or polysilicon. Polysilicon has better stability, avoids time- and temperature-variant p-n junctions, and can be used in operating temperatures up to 200°C [1]. All mechanical sensors are based on material changes caused by stress placed on a membrane or other flexible element. On the submillimeter scale of integrated devices, materials like silicon show very little or no fatigue, which is apparently a macroscale phenomenon. Thus integrated sensors can be flexed indefinitely, and have a long lifetime.

In addition to sensors based on the piezoresistive effect, there also exist high-precision sensors based on capacitive effect. A membrane is also used, with one plate of a capacitor mounted on the membrane and the other plate suspended above it, usually fabricated on a relatively inflexible material such as Pyrex glass. The deflection of the membrane changes the distance between the plates and thus changes the capacitance. Capacitors tend to be much less temperature and time variant than piezoresistors. Output of capacitive sensors is highly appropriate for switched-cap circuit design [2].

Other mechanical sensors are based on micromachining techniques. Silicon reed oscillators are formed from a millimeter-scale paddle suspended by a thin silicon bridge, which is caused to oscillate. The amplitude of the vibrations are highly sensitive to pressure changes, and make a good sensor for measuring vacuums in the 10e-2 to 10e5 Pa range. Another kind of vacuum sensor is made from a micromachined floating membrane [1].

When standard or modified CMOS or bipolar processes are used in order to fabricate the sensor, signal processing can be done at the source. On-chip amplification of the signal is the first necessary step to ensure minimizing the effect of noise on the output. On-chip circuitry is also necessary in a high-quality system to compensate for temperature variation. Temperature-dependent behavior is seen as the limiting factor in integrated sensors. Bandgap reference circuits are designed which have a negative temperature coefficient. This is added to the output to compensate for the positive temperature coefficient of the sensor. The voltage reference can either be designed by circuit and material analysis to compensate for the expected temperature dependence of the sensor, or it can be made programmable and the chip can be calibrated after manufacturing. High-performance systems often have bandgap references which are tuned after manufacture by laser trimming [1]. This of course adds to the cost of the device.

Early digitization of the signal is another common treatment which eliminates the problem of noise and nonlinear effects between the sensor and the instrument or control system that depends on its output. An alternative to digital output is a frequency-based output such as duty-cycle variation which is also robust in the presence of noise.

Piezoresistive Sensors

Certain materials, of which Silicon is a notable example, are sensitive to changes resulting from stress applied to the crystal lattice. Resistance, in particular, is dependent on the changes in length caused by stress. Resistive changes are not isotropic, and can be divided into two independent functions, one component parallel to the direction of stress, and one component perpendicular to it, in the form of:

where and are the perpendicular and parallel components of stress, respectively, and and are the perpendicular and parallel piezoresistive coefficients. The coefficients are functions of temperature and doping concentration. The stresses are proportional to pressure and to the the square of the ratio / h where h is the thickness of the membrane and is the distance from the membrane center to the edge [5].

Sensors are sometimes designed using finite element analysis or other precision simulation to find membrane and resistor shapes and configurations which maximize this sensitivity.

About the simplest sensor circuit that can be built using piezoresistors is the Wheatstone bridge, shown below.


The bridge is made of four piezoresistors located on the four edges of the sensor membrane, close to the edges where the stress is greatest when vertical pressure is applied to the center (or uniformly across) the membrane. Two of the resistors are positioned parallel to the direction of the stress, and their resistance increases with pressure. The other two resistors are oriented perpendicual to the direction of the stress, and their resistance decreases with pressure. This configuration is shown in the figure below. The parallel resistors are made as two resistors in series in order to maximize sensitvity, which is a decreasing function of distance from the edge of the membrane, while keeping the absolute resistance the same as the perpendicularly-oriented resistors.


Configuration of piezoresistors around a membrane.

The solution to the Wheatstone bridge as shown in the schematic above is:

Resistors and are oriented parallel to the stress, and resistors and are oriented perpendicular to it. Thus when the resistance of increases and decreases, the output increases. This is the configuration of our fabricated sensor, with the resistor ends leading to bonding pads. Configuration of the bridge and signal amplification are all off-chip, to reduce the number of steps in the process and make is feasible for the project to be completed by untrained students in one semester.

Fabrication Process

The figure at the top of the paper shows the layout of one sensor device on our chip. Mask layers (see below) are as follows:
  1. (Green) p-diffusion
  2. (Red) back-etch
  3. (Black) contact cuts
  4. (Blue) aluminum
The fabrication process begins with a 4'' wafer of about 400µm thickness, n-type, <100> orientation. The process steps are outlined and illustrated below.


A layer of oxide is built by wet oxidation in a furnace at 1100°C for 60 minutes.



3 ml OCG 820 27CS photoresist is spun on at 4000 rpm for 60 s, and prebaked at 110°C for 45 s.



Wafer is aligned to mask 1, exposed for 12 seconds, and developed for 20 seconds in a developer solution of 4:1 H2O and OCG developer



Diffusion openings are etched into the oxide by immersion in an etchant (296 g NH4F, 106 ml HF, and 425 ml DI water) for 5 minutes.



3 ml Boron-A dopant is spun on for 60 seconds at 3000 RPM and maximum acceleration, then diffused in a furnace at 1100°C for 60 minutes in a nitrogen atmosphere.



Steam is introduced into the furnace, and forms a layer of borosilicate glass on the surface. Glass is grown for 40 minutes at 1100°C.



Wafer is baked at 200°C for 30 minutes. Photoresist is then applied to the front side of the wafer for protection, spun on at 4000 RPM for 60 seconds, and hard-baked at 150°C for 30 minutes. Next, photoresist is spun onto the backside of the wafer at 3000 RPM for 60 seconds, and prebaked at 110°C for 45 seconds.



Wafer is aligned to mask 2 (on the backside), exposed for 15 seconds, and developed for 15 seconds in 1:4 KTI 809 developer and DI water. Wafer is postbaked at 130°C for 60 seconds. Oxide is etched from backside by immersion in buffered HF for 5 minutes.



Photoresist is stripped off with acetone. Si is etched from backside in KOH solution at 60°C, until thickness of membrane is about 50 µm.



Photoresist is applied to front side at 4000 RPM for 60 seconds, and prebaked at 110°C for 45 seconds.



Wafer is aligned to mask 3, exposed for 15 seconds and developed for 15 seconds in 1:4 KTI 809 deveoper and DI water. Wafer is postbaked at 130°C for 60 seconds.



Wafer is etched in buffered HF for 5 (?) minutes until oxide and borosilicate glass are removed from the contact cuts.



Aluminum is evaporated onto the front side of the wafer. In our setup, 0.5 g of Aluminum wire was evaporated in a chamber at approximately 8e-7 torr. This created a layer of about 4.5 µm thickness.



Photoresist is spun on at 4000 RPM for 60 seconds, and prebaked at 115°C for 60 seconds.



Wafer is aligned to mask 4, exposed for 15 seconds, developed for 12 seconds in 1:4 KTI 809 developer and DI water, then postbaked at 130°C for 60 seconds.



Aluminum is etched by immersion in PAN etch (75 ml phosphoric acid, 3 ml nitric acid, 15 ml, and 5 ml DI water) for approximately 10 minutes, until aluminum is visibly removed.



Photoresist is removed with acetone, then annealed at 450°C in a nitrogen atmosphere for 30 minutes.


Fabrication is completed by scribing and dicing the wafer, mounting on a copper-plated printed circuit board with epoxy, and bonding the pads to the bond fingers.

Results

Physical structures on the chip were measured during the course of processing: Electical structures were measured upon completion of the chip but before scribing and dicing: There was a high variation in resistance values across the chip. For the four piezoresistors surrounding the membranes, the mean value was 144 . The average standard deviation for resistors around the same membrane was 2.56 , but the standard deviation for all resistors was 11.86 .

Test structures on the chip were analyzed with the following results:

Piezoresistors had the following values:

The response of the system was measured by amplifying the output of the Wheatstone bridge with a simple amplifier circuit constructed out of a 1NA101-AM Burr-Brown integrated amplifier, using an external resistor of 400 to provide a gain of approximately 100. Input was 2.32 V AC at about 100 Hz. Output was measured with the back of the mounted chip attached to a vacuum pump capable of pressures in the range 50-500 mmHg. Settling time of the response was quite large, possibly due to the unconnected substrate (which was possibly connected to all of the resistors through the contacts, which had an extreme amount of undercut due to overetching), and probably also due to temperature effects at the resistors heat and cool in response to current flow in the circuit. Measurements are not entirely accurate due to the impatience of the observer. Measurements tended to be lower when read as the vacuum pressure was lowered from 500 mmHg to zero, and higher when read as the vacuum pressure was raised from zero to 500 mmHg. Due to this and the jitter of the vacuum pump, no attempt will be made to assess the linearity of the system, other than to note that it looks reasonable.

Output AC voltage of the system was measured with a Keithly multimeter. The amplifier frequency response was measured in the context of the entire system and had a bandwidth of 30 kHz.


Response of system with gain of 100.

Discussion

This little chip was clearly not intended to compete with state-of-the-art devices. It has no temperature compensation, has low sensitivity, and rather low yield. However, I will make some attempt to compare it to a capacitive sensor built by F. V. Schnatz et al in Germany in 1991 and presented at the 6th International Conference on Solid-State Sensors and Actuators, San Francisco, June 24-28, 1991 [2].

The capacitive pressure sensor is built with a standard CMOS 3 µm n-well process. This is a useful property since the chip can be sent off to any high-quality commercial or institutional lab and postprocessed to create the membrane (obviously the point of our lab was to be hands-on through the entire process). For feature-size comparison, our smallest features were on a 20 µm scale.

The capacitive sensor features a membrane ``bossed'' on the underside, which means the membrane itself forms a square, with the middle of the membrane being the same thickness as the rest of the wafer. This increases linearity of the capacitor by ensuring that the capacitive plates, which are situated over the boss, are flat and move without bending relative to the top plate.

The top plate is formed on Pyrex glass etched to form support columns to hold the capacitor top plate at the proper distance from the bottom. The metal top plate is deposited directly onto the glass, and the glass structure is bonded anodically to the chip. Chip circuitry features a programmable voltage reference and a switched-cap amplifier. Output is a voltage, which makes it easier to compare the performance to that of our chip.

The standard CMOS process involves about 7 or 8 mask steps, and the chip requires one additional mask to define the bossed membrane, and two mask steps are required to etch and metallize the Pyrex glass. This is a total of at least 10 masks for fabrication, compared to our four masks.

Nonlinearity of the chip output voltage was confined to 0.4% over the operating range of 0 to 30 kPa, with an output of 1.0 V to 5.0 V over that range. Note that we did not attempt to find an upper limit of pressure for our sensor, but it is doubtful that it should be operated much above our test limit of 500 Pa. The capacitor pressure sensor therefore has an operating range which is orders of magnitude larger than that of our chip.

Sensitivity for the capacitive sensor is measured as change in capacitance per unit pressure. The capacitor has temperature-dependent offsets and sensitivity which, although not as severe as temperature dependencies in a resistor, can be reduced by the bandgap reference circuit. Due to limited time and equipment, I did not attempt to characterize the temperature dependence of our circuit.

Conclusions

The experience of having fabricated a working circuit in silicon is a wonderful thing in and of itself, and that a working circuit was the end result of this laboratory is all the conclusion that is required here.

I have very few recommendations for future work; a few things are obvious necessities such as a substrate contact somewhere on the chip, and remaking the mask for which there were no large-scale alignment bars. If the knowledge and experience gained from this year makes next year's project run smoother and faster, then it would probably be well worth the while to add a passivation layer and an extra mask step for contact cuts. It would also be helpful if a better method existed for aligning the back side of the wafer to the front, although it appears that I was the only person to suffer a serious misalignment problem, the source of which is not known to me. One problem with misalignment of the back is that it is virtually impossible to detect the misalignment until the chip is diced up.

Acknowledgements

I would like to thank Dr. Norman Sheppard, Dr. Andreas Andreou, and Robert Greenberg for their unceasing efforts in making this an efficient and educational fabrication laboratory.

Bibliography

[1] Hauptmann, Peter. Sensors: Principles & Applications , Hertfordshire, UK, Carl Hanser Verlag (1991).
[2] F. V. Schnatz et al. ``Smart CMOS capacitive pressure transducer with on-chip calibration capability,'' Sensors & Actuators A (Physical) , Vol. 34, July 1992, pp. 77-82.
[3] Moon Key Lee, Bo Na Lee, and Seung Min Jung, ``A bipolar integrated silicon pressure sensor,'' Sensors & Actuators A (Physical), Vol. 34, July 1992, pp. 1-6.
[4] Jaeger, Richard C. Introduction to Microelectronic Fabrication, Reading, MA, Addison-Wesley (1993).
[5] S. Clark, and Kensall Wise, ``Pressure sensitivity in anisotropically etched thin-diaphragm pressure sensors,'' IEEE Transactions on Electron Devices , Vol. ED-26, No. 12, December 1979, pp. 1887-1896.
Hardcopy (PostScript) of this project report: sensor.ps

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