Open Circuit Design / Chipalooza
Now accepting proposals for IHP SG13CMOS5L

The Chipalooza Challenge

Open source analog IP for the SoCs of tomorrow

Five shuttle challenges across three major open-source PDKs. Design an analog IP block, get it fabricated, and win awards for your effort.

View the Schedule Read the FAQ
Analog IP block layout example
An analog IP block designed for Chipalooza Challenge #1 (Efabless, Sky130, 2024)

The goal of Chipalooza Challenge is to provide open source libraries of high-quality analog components useful to designers of SoCs for all three major open source PDKs, enabling cross-platform porting of SoCs and a shared home for the IP that analog designers need.

Chip Foundry

Sky130

Two challenges, including the original 2024 Efabless run that produced dozens of analog circuits across two test chips, now living in public GitHub repositories.

Wafer.Space

GF180MCU

Two challenges bringing the same open IP model to GlobalFoundries' 180nm process.

IHP

SG13CMOS5L

Challenge #2 is live now! Proposals are due July 27, 2026, with a grace period through August 10.

How do I get involved? Keep up with posts on fossi-chat.org/#chipalooza, follow the schedule, join challenge meetings, and send in your analog IP proposal by the posted due date. See the Get Involved page for how to submit.